The invention is related to the isolation of individual elements in integrated circuit (IC) devices. It is mainly concerned with very large scale integration (VLSI) wherein a large number of circuits are fabricated simultaneously on a silicon wafer using planar photolithographic technology. Each individual circuit can be quite complex because it can contain a relatively large number of components. Typically, the individual components are isolated from each other by the use of reverse biased PN junctions which surround the devices. Recently it has become a common practice to employ what is called trench isolation wherein the devices are surrounded by trenches which are slots etched into the silicon wafer and extend into the bulk of the structure to completely penetrate the device structure and thereby help to isolate it. The devices still employ PN junction isolation over their main area contact with the semiconductor wafer, but their peripheral surface areas are trench isolated. Since anisotropic etching has become commonplace it has been found that deep trenches can be made narrower than the conventional isolation diffusion used in the past. This greatly reduces surface area requirements and therefore increases the device density for VLSI.
Typically, the isolation trenches are backfilled so that surface planarity is maintained. Chu et al. U.S. Pat. No. 4,385,975 is directed to the filling of both narrow and wide trenches with silicon dioxide and the planarization of the substrate wafer surface. This approach is useful because it had been found that when a process was optimized for one size of trench it was dificult to accommodate other trench widths on the same wafer. The teaching in this patent is incorporated herein by reference.
Chu et al. point out that capacitive coupling between the surface conductors and the substrate can be reduced by increasing the thickness of the dielectric material that separates the substrate from the conductors. Thus, it is desirable to employ wide trenches where the devices are widely separated. In other words, the circuits are capable of higher frequency operation if the conductors are located over dielectric filled trenches, in the regions between devices, rather than over the conventional planar oxide. However, the use of silicon dioxide filled trenches precludes the formation of active devices within the trench areas.